ESP32 hardware bring-up
Target identity
- Board product and revision:
- SoC family and revision:
- Module marking:
- Flash / PSRAM:
- USB connector and transport:
- Stable port identity:
- Existing firmware / bootloader:
Authoritative sources
| Artifact |
URL or local document |
Revision / access date |
Decision supported |
| Board schematic |
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| Board pinout/user guide |
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| Module datasheet |
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| SoC datasheet/errata |
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| Framework board definition |
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| Attached component datasheet |
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| Breakout/module schematic |
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Power budget
| Rail / source |
Voltage |
Continuous limit |
Peak load |
Consumers |
Measured |
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- Logic voltage:
- Shared ground or isolation:
- Decoupling / bulk capacitance:
- Brownout margin:
- Worst-case radio + actuator condition:
Pin plan
| Function |
GPIO / board alias |
Direction |
Reset state |
Pull / level |
Conflicts checked |
Source |
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Check for strapping, flash/PSRAM, USB/JTAG, console, input-only, ADC, RTC/wake, onboard peripherals, and boot-time pulses.
Attached devices
| Device |
Interface |
Address / CS |
Supply |
Peak current |
Driver / protection |
Identity check |
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Firmware path
- Framework and pinned version:
- Exact board/target identifier:
- Project generator/example:
- Build command:
- Flash command and source of offsets:
- Monitor/log command:
- Debugger/test command:
- OTA/update path:
- Known-good recovery image and procedure:
Layered verification
Known gaps and risks