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* feat(electronics): add design and bench methodology * fix(electronics): retain compact diagnostic evidence * test(electronics): accept equivalent loading diagnostics
49 lines
3.0 KiB
Markdown
49 lines
3.0 KiB
Markdown
# Fault isolation
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Write one leading hypothesis per branch. For each, state the predicted
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observation, least-intrusive decisive test, mutation or safety effect, result,
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and next branch. Keep power, topology, electrical levels, timing, protocol,
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driver, and application assumptions as separate layers.
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| Observation | Prediction to test first | Decisive evidence |
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|---|---|---|
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| Rail correct at rest, resets under load | supply impedance or transient current | scope rail during event; measure source current |
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| I2C line never rises | short, unpowered device, wrong rail, or held line | resistance/power isolation and scope idle level |
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| Slow rise, marginal high | excessive C, duplicate/weak pull-up, probe loading | measured `tr`, effective pull-up, repeat with low-C probe |
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| Address ACKs, identity wrong | address notation, wrong device, pointer/order | documented identity register and raw capture |
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| NAK after reset only | readiness/reset timing or power sequence | reset-to-first-command timing and status polling |
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| Bus hangs in software | missing timeout or unsupported stretch | captured SCL/SDA ownership and bounded wait result |
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| Probe changes behavior | probe capacitance/ground inductance/loading | compare probe attachments and saved waveforms |
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Do not “fix” a symptom by increasing speed, disabling brownout, erasing state,
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or adding stronger pull-ups before measuring the layer that failed. Close a
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hypothesis only when an observation discriminates it from its nearest rival.
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Record absent schematics, datasheets, captures, or labels as blocked evidence.
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For an intermittent issue, capture a failing and passing event with the same
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trigger and settings. Compare timing, rail droop, ACK position, reset reason,
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temperature, and mechanical state. Change one variable at a time and preserve
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the firmware, wiring, and instrument revisions.
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Exit when the failure is reproduced or bounded to a missing artifact, the next
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test has a predicted outcome, and recovery leaves the system in a known state.
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## Test quality and localization
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Name the observation before running the test. “Read returned zero” is a result;
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“device absent” is an inference requiring address, power, reset, and scan-method
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evidence. “Continuity passed” is a result; “solder joint good” exceeds what that
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test establishes. For each inference, list the nearest competing cause and the
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evidence that excludes it.
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For intermittent faults, preserve passing and failing captures with the same
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trigger, settings, firmware, and physical state. If attaching a probe makes a
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fault disappear, treat the probe as a possible pull-up, capacitance, ground
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return, or mechanical stabilizer. Remove it and repeat before changing the
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circuit. If reducing I2C speed helps, classify it as a timing or signal-
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integrity clue, not a root-cause fix.
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After three non-converging tests, escalate in a bounded way: identify the
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missing exact schematic, datasheet, capture, or known-good comparison; state
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the safe next acquisition; and stop the branch until it exists.
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